I have never worked under the hood of an emulation project, but my understanding is that the Mister/Analogue cores are best understood as an "FPGA implementation of existing software emulation."
In other words, they are not emulating the 68K, VDP, and other supporting chips on a gate-for-gate basis. They are emulating them at a higher level.
With the decapping of the Genesis' hardware, it should now be possible to truly emulate them at a 1:1 hardware level. This theoretically can lead to far more accurate emulation. I believe this is a lot more FPGA resource-intensive and may exceed what the existing MISTer/Analogue cores can handle, though I'm way out of my depth here.
In other words, they are not emulating the 68K, VDP, and other supporting chips on a gate-for-gate basis. They are emulating them at a higher level.
With the decapping of the Genesis' hardware, it should now be possible to truly emulate them at a 1:1 hardware level. This theoretically can lead to far more accurate emulation. I believe this is a lot more FPGA resource-intensive and may exceed what the existing MISTer/Analogue cores can handle, though I'm way out of my depth here.