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  Do you still need to use vector instructions on KNL to get top performance?
Yes, but this is also the case for regular Xeons.

  If so then forgot about "familiarity" when rewriting.
When I say "familiarity" I'm referring to tooling in things like compilers and debuggers as well as just the instruction set.


Right. The only thing that looks particularly different (compared with the typical HPC node intended for workhorse vectorized code) about KNL on paper is the memory system, and possibly integrated interconnect. Given the usual library support, I don't see why there should be significant re-writing to be done, any more than for other AVX transitions (unless you're developing BLAS etc.).




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